This invention relates to formation of cavities in ceramic substrates for receiving integrated circuit chips and other components of a high density interconnect (HDI) structure and, more particularly, to methods for optimally operating a computer numerical control (CNC) milling machine to form such cavities.
As disclosed in Eichelberger et al. U.S. Pat. No. 4,783,695, and related patents, a high density interconnect (HDI) structure which has been developed by General Electric Company offers many advantages in the compact assembly of digital and other electronic systems. For example, an electronic system such as a microcomputer which incorporates between thirty and fifty chips, or even more, can be fully assembled and interconnected on a single substrate which is fifty mm ( roughly two inches) long by fifty mm wide by 1.27 mm (50 mils) thick. This high density interconnect structure can be disassembled for repair or replacement of a faulty component and then reassembled without significant risk to the good components incorporated in the system. Repairability is particularly important where fifty or more chips having a cost of as much as $2,000.00 each, may be incorporated in a single system on one substrate. This repairability is a substantial advance over prior interconnection systems in which reworking the system to replace damaged components is either impossible or involves substantial risk to the good components. Exemplary testing and repair techniques are disclosed in Eichelberger et al. U.S. Pat. Nos. 4,878,991, 4,884,122 and 4,937,203.
Briefly, in systems employing this high density interconnect structure, a ceramic substrate is provided. The ceramic substrate may be made of alumina, for example, with a thickness between 0.635 and 2.54 mm (25 and 100 mils, respectively). The substrate is of appropriate size and strength for the overall system, typically less than fifty mm square.
Once the positions of the various chips have been specified, individual cavities or one large cavity having appropriate depths at the intended locations of the various chips are prepared. This may be done by starting with a bare substrate having a uniform thickness and the desired size. Conventional, laser or ultrasonic milling may be used to form the cavities in which the various chips and other components will be positioned. For systems where it is desired to place chips of uniform size edge-to-edge, a single large cavity may be satisfactory. That large cavity has a uniform depth where the semiconductor chips have a substantially uniform thickness.
Typically, however, an electronic system includes chips and other components having a variety of overall sizes and thicknesses, and there are a plurality of cavities. Where a relatively thicker or a relatively thinner component will be placed, the corresponding cavity bottom must be made respectively deeper or shallower to place the upper surface of that component in substantially the same plane as the upper surface of the rest of the components and the surface of the unmilled portion of the substrate which surrounds the cavity.
The cavity bottoms are then each provided with a thermoplastic adhesive layer which may preferably be polyetherimide resin available under the trade name ULTEM.RTM. from the General Electric Company, Pittsfield, MA. The various components are then placed in their desired locations within the cavities. The entire structure is heated to the softening point of the ULTEM polyetherimide (in the vicinity of 217.degree. C. to 235.degree. C. depending on the formulation used) and then cooled to thermoplastically bond the individual components to the substrate. At this stage, the upper surfaces of all components and the substrate are disposed in substantially a common plane.
Alternatively, after the cavities are formed, an initial layer of metallization may be deposited over the entire substrate, including the cavity bottoms, and then patterned to define conductors. This initial layer of metallization is termed "metal zero". Patterned "metal zero" conductors formed directly on the substrate are brought out to the edges of the substrate to ultimately facilitate electrical connection to the system. In some cases "metal zero" conductor areas remain in the cavity bottoms to form back side bias connections, and the chips or other components are attached with conductive adhesive to these "metal zero" conductor areas.
In either event, after the components are in place, a multi-layer interconnection structure is built up to electrically interconnect the components into an actual functioning system. To begin the interconnection structure, a polyimide dielectric film which is about 0.0005 to 0.003 inches and which may be KAPTON.RTM. polyimide (12.5 to 75 thick), available from E.I. du Pont de Nemours and Company, Wilmington, DE, is pretreated to promote adhesion and coated on one side with an ULTEM polyetherimide resin or another thermoplastic.
The KAPTON polyimide film is then laminated across the tops of the chips, other components and the substrate, with the ULTEM resin serving as a thermoplastic adhesive to hold the KAPTON film in place.
Next, via holes are laser drilled in the KAPTON film and ULTEM adhesive layers in alignment with the contact pads on the electronic components to which it is desired to make contact. Exemplary laser drilling techniques are disclosed in Eichelberger et al. Pat. Nos. 4,714,516 and 4,894,115; and in Loughran et al. Pat. No. 4,764,485, all of which are assigned to the present assignee..
A metallization layer is deposited over the KAPTON film layer so as to extend into the via holes and make electrical contact to the contact pads disposed thereunder. This metallization layer may be patterned to form individual conductors during its deposition process, or may be deposited as a continuous layer and then patterned using photoresist and etching. The photoresist is preferably exposed using a laser which is scanned relative to the substrate to provide an accurately aligned conductor pattern at the end of the process. Exemplary techniques for patterning the metallization layer are disclosed in Wojnarowski et al. U.S. Pat No. 4,780,177 and 4,842,677; and in Eichelberger et al. Pat. No. 4,835,704, all of which are assigned to the present assignee.
Additional dielectric and metallization layers are provided as required in order to provide all of the desired electrical connections among the chips. Any misposition of the individual electronic components and their contact pads is compensated for by an adaptive laser lithography system as disclosed in Eichelberger et al. U.S. Pat. No. 4,835,704 which is assigned to the present assignee..
The designer of such a system incorporated in a high density interconnect (HDI) structure typically specifies the arrangement of the chips and other components to best suit circuit topology, without particular regard to the required cavities in the substrate, except to keep the overall size of the system such that it will fit on a fifty mm by fifty mm (roughly two inch by two inch) substrate, for example. Certain design rules are involved in the arrangement of the various components. For example, in order to allow for inaccuracies in a "pick and place" machine which places individual chips within cavities on the substrate, a specific minimum distance between neighboring chips must be maintained, for example 0.400 mm (15.75 mils). Although not an initial concern of the circuit designer, a related consideration is that the individual cavities must be larger than the chips, for example, by about 0.254 mm (10 mils) on each side. It would be difficult to automatically place chips in cavities which were precisely to size, necessitating exact positioning.
As a result of these considerations, what is known at the time when the cavities are to be formed, based on the locations and dimensions of the various components, are locations and dimensions of a set of cavities corresponding to the components on a one-for-one basis. Particular neighboring cavities of this set will either overlap or be separated by walls, since they were not dealt with being that they were not of concern during the initial stages of circuit design and layout.
A suitable machine for milling such cavities in a substrate is a model DM2800 computer numerical control (CNC) milling machine made by Dyna Mechtronics, of Sunnyvale, California. Although intended for milling metal, the DM2800 CNC milling machine, when appropriately programmed, has been found suitable for milling ceramic substrates, which have a hardness approaching that of diamond. As is known, such CNC milling machines operate under program control and execute program instructions in a particular language which includes such instructions as move to a particular point in space, repeat a sequence of instructions a specified number of times, skip to a particular instruction step, and execute a subroutine.
There exist so-called computer aided manufacturing (CAM) programs which serve to take the specification of a part, potentially a complex part, and generate CNC program instructions to direct a milling machine to form that part. However, application of such CAM program to the specific task of generating CNC instructions for milling an HDI substrate has a number of disadvantages. As one example, such CAM program may leave extremely thin and thus fragile walls between neighboring cavities. The thin walls are highly prone to subsequent breakage. As another deficiency, such prior CAM programs generate CNC instructions which produce overlapping cavities that are milled separately and independently, resulting in an inefficient and slower tool path.
Prior CAM programs exhibit a variety of other deficiencies when their use is attempted for the particular application of generating CNC instructions to mill ceramic HDI substrates. Such CAM programs generally operate to minimize tool movement. While this is a reasonable approach when milling metal, when ceramic is milled, minimizing tool wear is a significant consideration, which must be taken into account when specifying a tool path. As noted above, the ceramic HDI substrate material is very hard, almost as hard as diamond. Also, a CAM program intended for generating program instructions for milling metal will generally not generate program instructions which result in producing a suitably smooth finish when milling ceramic.